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dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add support for QMC HDLC
The QMC (QUICC mutichannel controller) is a controller present in some PowerQUICC SoC such as MPC885. The QMC HDLC uses the QMC controller to transfer HDLC data. Additionally, a framer can be connected to the QMC HDLC. If present, this framer is the interface between the TDM bus used by the QMC HDLC and the E1/T1 line. The QMC HDLC can use this framer to get information about the E1/T1 line and configure the E1/T1 line. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231011061437.64213-9-herve.codina@bootlin.com Signed-off-by: Rob Herring <robh@kernel.org>
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@ -101,6 +101,32 @@ patternProperties:
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Channel assigned Rx time-slots within the Rx time-slots routed by the
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Channel assigned Rx time-slots within the Rx time-slots routed by the
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TSA to this cell.
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TSA to this cell.
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compatible:
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items:
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- enum:
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- fsl,mpc885-scc-qmc-hdlc
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- fsl,mpc866-scc-qmc-hdlc
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- const: fsl,cpm1-scc-qmc-hdlc
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- const: fsl,qmc-hdlc
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fsl,framer:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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phandle to the framer node. The framer is in charge of an E1/T1 line
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interface connected to the TDM bus. It can be used to get the E1/T1 line
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status such as link up/down.
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allOf:
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- if:
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properties:
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compatible:
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not:
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contains:
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const: fsl,qmc-hdlc
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then:
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properties:
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fsl,framer: false
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required:
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required:
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- reg
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- reg
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- fsl,tx-ts-mask
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- fsl,tx-ts-mask
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@ -155,9 +181,13 @@ examples:
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channel@19 {
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channel@19 {
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/* Ch19 : 8 TS (TS 8..15) from all routed from TSA */
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/* Ch19 : 8 TS (TS 8..15) from all routed from TSA */
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compatible = "fsl,mpc885-scc-qmc-hdlc",
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"fsl,cpm1-scc-qmc-hdlc",
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"fsl,qmc-hdlc";
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reg = <19>;
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reg = <19>;
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fsl,operational-mode = "hdlc";
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fsl,operational-mode = "hdlc";
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fsl,tx-ts-mask = <0x00000000 0x0000ff00>;
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fsl,tx-ts-mask = <0x00000000 0x0000ff00>;
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fsl,rx-ts-mask = <0x00000000 0x0000ff00>;
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fsl,rx-ts-mask = <0x00000000 0x0000ff00>;
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fsl,framer = <&framer>;
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};
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};
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};
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};
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