mirror of
https://github.com/torvalds/linux.git
synced 2024-11-01 13:03:25 +01:00
c4273a6692
- Fix function prototypes to address clang function type cast
warnings in the math-emu code
- Reorder definitions in <asm/msr-index.h>
- Remove unused code
- Fix typos
- Simplify #include sections
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'x86-cleanups-2024-05-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 cleanups from Ingo Molnar:
- Fix function prototypes to address clang function type cast
warnings in the math-emu code
- Reorder definitions in <asm/msr-index.h>
- Remove unused code
- Fix typos
- Simplify #include sections
* tag 'x86-cleanups-2024-05-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/pci/ce4100: Remove unused 'struct sim_reg_op'
x86/msr: Move ARCH_CAP_XAPIC_DISABLE bit definition to its rightful place
x86/math-emu: Fix function cast warnings
x86/extable: Remove unused fixup type EX_TYPE_COPY
x86/rtc: Remove unused intel-mid.h
x86/32: Remove unused IA32_STACK_TOP and two externs
x86/head: Simplify relative include path to xen-head.S
x86/fred: Fix typo in Kconfig description
x86/syscall/compat: Remove ia32_unistd.h
x86/syscall/compat: Remove unused macro __SYSCALL_ia32_NR
x86/virt/tdx: Remove duplicate include
x86/xen: Remove duplicate #include
528 lines
13 KiB
ArmAsm
528 lines
13 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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*
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* Copyright (C) 1991, 1992 Linus Torvalds
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*
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* Enhanced CPU detection and feature setting code by Mike Jagdis
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* and Martin Mares, November 1997.
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*/
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.text
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#include <linux/export.h>
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#include <linux/threads.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/page_types.h>
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#include <asm/pgtable_types.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#include <asm/asm-offsets.h>
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#include <asm/setup.h>
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#include <asm/processor-flags.h>
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#include <asm/msr-index.h>
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#include <asm/cpufeatures.h>
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#include <asm/percpu.h>
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#include <asm/nops.h>
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#include <asm/nospec-branch.h>
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#include <asm/bootparam.h>
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#include <asm/pgtable_32.h>
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/* Physical address */
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#define pa(X) ((X) - __PAGE_OFFSET)
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/*
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* References to members of the new_cpu_data structure.
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*/
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#define X86 new_cpu_data+CPUINFO_x86
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#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
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#define X86_MODEL new_cpu_data+CPUINFO_x86_model
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#define X86_STEPPING new_cpu_data+CPUINFO_x86_stepping
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#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
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#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
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#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
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#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
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/*
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* Worst-case size of the kernel mapping we need to make:
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* a relocatable kernel can live anywhere in lowmem, so we need to be able
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* to map all of lowmem.
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*/
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KERNEL_PAGES = LOWMEM_PAGES
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INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
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RESERVE_BRK(pagetables, INIT_MAP_SIZE)
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/*
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* 32-bit kernel entrypoint; only used by the boot CPU. On entry,
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* %esi points to the real-mode code as a 32-bit pointer.
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* CS and DS must be 4 GB flat segments, but we don't depend on
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* any particular GDT layout, because we load our own as soon as we
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* can.
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*/
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__HEAD
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SYM_CODE_START(startup_32)
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movl pa(initial_stack),%ecx
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/*
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* Set segments to known values.
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*/
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lgdt pa(boot_gdt_descr)
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movl $(__BOOT_DS),%eax
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movl %eax,%ds
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movl %eax,%es
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movl %eax,%fs
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movl %eax,%gs
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movl %eax,%ss
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leal -__PAGE_OFFSET(%ecx),%esp
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/*
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* Clear BSS first so that there are no surprises...
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*/
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cld
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xorl %eax,%eax
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movl $pa(__bss_start),%edi
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movl $pa(__bss_stop),%ecx
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subl %edi,%ecx
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shrl $2,%ecx
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rep ; stosl
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/*
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* Copy bootup parameters out of the way.
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* Note: %esi still has the pointer to the real-mode data.
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* With the kexec as boot loader, parameter segment might be loaded beyond
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* kernel image and might not even be addressable by early boot page tables.
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* (kexec on panic case). Hence copy out the parameters before initializing
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* page tables.
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*/
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movl $pa(boot_params),%edi
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movl $(PARAM_SIZE/4),%ecx
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cld
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rep
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movsl
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movl pa(boot_params) + NEW_CL_POINTER,%esi
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andl %esi,%esi
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jz 1f # No command line
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movl $pa(boot_command_line),%edi
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movl $(COMMAND_LINE_SIZE/4),%ecx
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rep
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movsl
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1:
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#ifdef CONFIG_OLPC
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/* save OFW's pgdir table for later use when calling into OFW */
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movl %cr3, %eax
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movl %eax, pa(olpc_ofw_pgd)
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#endif
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/* Create early pagetables. */
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call mk_early_pgtbl_32
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/* Do early initialization of the fixmap area */
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movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
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#ifdef CONFIG_X86_PAE
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#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
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movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
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#else
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movl %eax,pa(initial_page_table+0xffc)
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#endif
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jmp .Ldefault_entry
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SYM_CODE_END(startup_32)
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/*
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* Non-boot CPU entry point; entered from trampoline.S
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* We can't lgdt here, because lgdt itself uses a data segment, but
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* we know the trampoline has already loaded the boot_gdt for us.
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*
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* If cpu hotplug is not supported then this code can go in init section
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* which will be freed later
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*/
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SYM_FUNC_START(startup_32_smp)
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cld
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movl $(__BOOT_DS),%eax
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movl %eax,%ds
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movl %eax,%es
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movl %eax,%fs
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movl %eax,%gs
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movl pa(initial_stack),%ecx
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movl %eax,%ss
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leal -__PAGE_OFFSET(%ecx),%esp
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.Ldefault_entry:
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movl $(CR0_STATE & ~X86_CR0_PG),%eax
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movl %eax,%cr0
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/*
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* We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
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* bits like NT set. This would confuse the debugger if this code is traced. So
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* initialize them properly now before switching to protected mode. That means
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* DF in particular (even though we have cleared it earlier after copying the
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* command line) because GCC expects it.
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*/
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pushl $0
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popfl
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/*
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* New page tables may be in 4Mbyte page mode and may be using the global pages.
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*
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* NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
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* if and only if CPUID exists and has flags other than the FPU flag set.
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*/
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movl $-1,pa(X86_CPUID) # preset CPUID level
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movl $X86_EFLAGS_ID,%ecx
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pushl %ecx
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popfl # set EFLAGS=ID
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pushfl
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popl %eax # get EFLAGS
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testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set?
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jz .Lenable_paging # hw disallowed setting of ID bit
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# which means no CPUID and no CR4
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xorl %eax,%eax
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cpuid
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movl %eax,pa(X86_CPUID) # save largest std CPUID function
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movl $1,%eax
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cpuid
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andl $~1,%edx # Ignore CPUID.FPU
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jz .Lenable_paging # No flags or only CPUID.FPU = no CR4
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movl pa(mmu_cr4_features),%eax
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movl %eax,%cr4
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testb $X86_CR4_PAE, %al # check if PAE is enabled
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jz .Lenable_paging
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/* Check if extended functions are implemented */
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movl $0x80000000, %eax
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cpuid
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/* Value must be in the range 0x80000001 to 0x8000ffff */
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subl $0x80000001, %eax
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cmpl $(0x8000ffff-0x80000001), %eax
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ja .Lenable_paging
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/* Clear bogus XD_DISABLE bits */
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call verify_cpu
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mov $0x80000001, %eax
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cpuid
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/* Execute Disable bit supported? */
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btl $(X86_FEATURE_NX & 31), %edx
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jnc .Lenable_paging
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/* Setup EFER (Extended Feature Enable Register) */
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movl $MSR_EFER, %ecx
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rdmsr
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btsl $_EFER_NX, %eax
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/* Make changes effective */
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wrmsr
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.Lenable_paging:
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/*
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* Enable paging
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*/
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movl $pa(initial_page_table), %eax
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movl %eax,%cr3 /* set the page table pointer.. */
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movl $CR0_STATE,%eax
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movl %eax,%cr0 /* ..and set paging (PG) bit */
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ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
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1:
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/* Shift the stack pointer to a virtual address */
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addl $__PAGE_OFFSET, %esp
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/*
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* Check if it is 486
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*/
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movb $4,X86 # at least 486
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cmpl $-1,X86_CPUID
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je .Lis486
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/* get vendor info */
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xorl %eax,%eax # call CPUID with 0 -> return vendor ID
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cpuid
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movl %eax,X86_CPUID # save CPUID level
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movl %ebx,X86_VENDOR_ID # lo 4 chars
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movl %edx,X86_VENDOR_ID+4 # next 4 chars
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movl %ecx,X86_VENDOR_ID+8 # last 4 chars
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orl %eax,%eax # do we have processor info as well?
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je .Lis486
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movl $1,%eax # Use the CPUID instruction to get CPU type
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cpuid
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movb %al,%cl # save reg for future use
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andb $0x0f,%ah # mask processor family
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movb %ah,X86
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andb $0xf0,%al # mask model
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shrb $4,%al
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movb %al,X86_MODEL
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andb $0x0f,%cl # mask mask revision
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movb %cl,X86_STEPPING
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movl %edx,X86_CAPABILITY
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.Lis486:
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movl $0x50022,%ecx # set AM, WP, NE and MP
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movl %cr0,%eax
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andl $0x80000011,%eax # Save PG,PE,ET
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orl %ecx,%eax
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movl %eax,%cr0
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lgdt early_gdt_descr
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ljmp $(__KERNEL_CS),$1f
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1: movl $(__KERNEL_DS),%eax # reload all the segment registers
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movl %eax,%ss # after changing gdt.
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movl $(__USER_DS),%eax # DS/ES contains default USER segment
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movl %eax,%ds
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movl %eax,%es
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movl $(__KERNEL_PERCPU), %eax
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movl %eax,%fs # set this cpu's percpu
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xorl %eax,%eax
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movl %eax,%gs # clear possible garbage in %gs
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xorl %eax,%eax # Clear LDT
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lldt %ax
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call *(initial_code)
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1: jmp 1b
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SYM_FUNC_END(startup_32_smp)
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#include "verify_cpu.S"
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__INIT
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SYM_FUNC_START(early_idt_handler_array)
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# 36(%esp) %eflags
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# 32(%esp) %cs
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# 28(%esp) %eip
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# 24(%rsp) error code
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i = 0
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.rept NUM_EXCEPTION_VECTORS
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.if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0
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pushl $0 # Dummy error code, to make stack frame uniform
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.endif
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pushl $i # 20(%esp) Vector number
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jmp early_idt_handler_common
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i = i + 1
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.fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
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.endr
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SYM_FUNC_END(early_idt_handler_array)
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SYM_CODE_START_LOCAL(early_idt_handler_common)
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/*
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* The stack is the hardware frame, an error code or zero, and the
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* vector number.
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*/
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cld
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incl %ss:early_recursion_flag
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/* The vector number is in pt_regs->gs */
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cld
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pushl %fs /* pt_regs->fs (__fsh varies by model) */
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pushl %es /* pt_regs->es (__esh varies by model) */
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pushl %ds /* pt_regs->ds (__dsh varies by model) */
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pushl %eax /* pt_regs->ax */
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pushl %ebp /* pt_regs->bp */
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pushl %edi /* pt_regs->di */
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pushl %esi /* pt_regs->si */
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pushl %edx /* pt_regs->dx */
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pushl %ecx /* pt_regs->cx */
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pushl %ebx /* pt_regs->bx */
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/* Fix up DS and ES */
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movl $(__KERNEL_DS), %ecx
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movl %ecx, %ds
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movl %ecx, %es
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/* Load the vector number into EDX */
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movl PT_GS(%esp), %edx
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/* Load GS into pt_regs->gs (and maybe clobber __gsh) */
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movw %gs, PT_GS(%esp)
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movl %esp, %eax /* args are pt_regs (EAX), trapnr (EDX) */
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call early_fixup_exception
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popl %ebx /* pt_regs->bx */
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popl %ecx /* pt_regs->cx */
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popl %edx /* pt_regs->dx */
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popl %esi /* pt_regs->si */
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popl %edi /* pt_regs->di */
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popl %ebp /* pt_regs->bp */
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popl %eax /* pt_regs->ax */
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popl %ds /* pt_regs->ds (always ignores __dsh) */
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popl %es /* pt_regs->es (always ignores __esh) */
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popl %fs /* pt_regs->fs (always ignores __fsh) */
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popl %gs /* pt_regs->gs (always ignores __gsh) */
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decl %ss:early_recursion_flag
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addl $4, %esp /* pop pt_regs->orig_ax */
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iret
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SYM_CODE_END(early_idt_handler_common)
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/* This is the default interrupt "handler" :-) */
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SYM_FUNC_START(early_ignore_irq)
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cld
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#ifdef CONFIG_PRINTK
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pushl %eax
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pushl %ecx
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pushl %edx
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pushl %es
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pushl %ds
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movl $(__KERNEL_DS),%eax
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movl %eax,%ds
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movl %eax,%es
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cmpl $2,early_recursion_flag
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je hlt_loop
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incl early_recursion_flag
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pushl 16(%esp)
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pushl 24(%esp)
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pushl 32(%esp)
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pushl 40(%esp)
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pushl $int_msg
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call _printk
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call dump_stack
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addl $(5*4),%esp
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popl %ds
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popl %es
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popl %edx
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popl %ecx
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popl %eax
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#endif
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iret
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hlt_loop:
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hlt
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jmp hlt_loop
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SYM_FUNC_END(early_ignore_irq)
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__INITDATA
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.align 4
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SYM_DATA(early_recursion_flag, .long 0)
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__REFDATA
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.align 4
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SYM_DATA(initial_code, .long i386_start_kernel)
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#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
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#define PGD_ALIGN (2 * PAGE_SIZE)
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#define PTI_USER_PGD_FILL 1024
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#else
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#define PGD_ALIGN (PAGE_SIZE)
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#define PTI_USER_PGD_FILL 0
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#endif
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/*
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* BSS section
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*/
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__PAGE_ALIGNED_BSS
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.align PGD_ALIGN
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#ifdef CONFIG_X86_PAE
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.globl initial_pg_pmd
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initial_pg_pmd:
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.fill 1024*KPMDS,4,0
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#else
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.globl initial_page_table
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initial_page_table:
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.fill 1024,4,0
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#endif
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.align PGD_ALIGN
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initial_pg_fixmap:
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.fill 1024,4,0
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.globl swapper_pg_dir
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.align PGD_ALIGN
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|
swapper_pg_dir:
|
|
.fill 1024,4,0
|
|
.fill PTI_USER_PGD_FILL,4,0
|
|
.globl empty_zero_page
|
|
empty_zero_page:
|
|
.fill 4096,1,0
|
|
EXPORT_SYMBOL(empty_zero_page)
|
|
|
|
/*
|
|
* This starts the data section.
|
|
*/
|
|
#ifdef CONFIG_X86_PAE
|
|
__PAGE_ALIGNED_DATA
|
|
/* Page-aligned for the benefit of paravirt? */
|
|
.align PGD_ALIGN
|
|
SYM_DATA_START(initial_page_table)
|
|
.long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
|
|
# if KPMDS == 3
|
|
.long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
|
|
.long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
|
|
.long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
|
|
# elif KPMDS == 2
|
|
.long 0,0
|
|
.long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
|
|
.long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
|
|
# elif KPMDS == 1
|
|
.long 0,0
|
|
.long 0,0
|
|
.long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
|
|
# else
|
|
# error "Kernel PMDs should be 1, 2 or 3"
|
|
# endif
|
|
.align PAGE_SIZE /* needs to be page-sized too */
|
|
|
|
#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
|
|
/*
|
|
* PTI needs another page so sync_initial_pagetable() works correctly
|
|
* and does not scribble over the data which is placed behind the
|
|
* actual initial_page_table. See clone_pgd_range().
|
|
*/
|
|
.fill 1024, 4, 0
|
|
#endif
|
|
|
|
SYM_DATA_END(initial_page_table)
|
|
#endif
|
|
|
|
.data
|
|
.balign 4
|
|
SYM_DATA(initial_stack, .long __top_init_kernel_stack)
|
|
|
|
__INITRODATA
|
|
int_msg:
|
|
.asciz "Unknown interrupt or fault at: %p %p %p\n"
|
|
|
|
#include "../xen/xen-head.S"
|
|
|
|
/*
|
|
* The IDT and GDT 'descriptors' are a strange 48-bit object
|
|
* only used by the lidt and lgdt instructions. They are not
|
|
* like usual segment descriptors - they consist of a 16-bit
|
|
* segment size, and 32-bit linear address value:
|
|
*/
|
|
|
|
.data
|
|
ALIGN
|
|
# early boot GDT descriptor (must use 1:1 address mapping)
|
|
.word 0 # 32 bit align gdt_desc.address
|
|
SYM_DATA_START_LOCAL(boot_gdt_descr)
|
|
.word __BOOT_DS+7
|
|
.long boot_gdt - __PAGE_OFFSET
|
|
SYM_DATA_END(boot_gdt_descr)
|
|
|
|
# boot GDT descriptor (later on used by CPU#0):
|
|
.word 0 # 32 bit align gdt_desc.address
|
|
SYM_DATA_START(early_gdt_descr)
|
|
.word GDT_ENTRIES*8-1
|
|
.long gdt_page /* Overwritten for secondary CPUs */
|
|
SYM_DATA_END(early_gdt_descr)
|
|
|
|
/*
|
|
* The boot_gdt must mirror the equivalent in setup.S and is
|
|
* used only for booting.
|
|
*/
|
|
.align L1_CACHE_BYTES
|
|
SYM_DATA_START(boot_gdt)
|
|
.fill GDT_ENTRY_BOOT_CS,8,0
|
|
.quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
|
|
.quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
|
|
SYM_DATA_END(boot_gdt)
|